The invention relates to an integrated logic circuit having an output circuit connected between a first and a second supply terminal with at least one data output in which the conductivity channel of an insulated gate output field effect transistor connects the said data output to one of the two supply terminals, the logic circuit comprising a control circuit for generating a time-dependent control voltage at the control electrode of the output field effect transistor.
Such a logic circuit is known from IBM's Technical Disclosure Bulletin, Vol. 27, No. 1A, June 1984, pp. 13 and 14, in which an output circuit is shown in which the control voltage at the control electrode of the output field effect transistor in the first instance increases slowly and, after switching on an extra field effect transistor, increases rapidly to make the output field effect transistor fully conductive in a short period of time.
In spite of this provision the prior art circuit arrangement suffers from the disadvantage that in particular during the rapid increase of the control voltage too high inductive reverse voltage peaks may yet be formed at the supply terminals on the integrated circuit which might seriously interfere with the correct operation of the circuit. Although the known circuit has for its object to mitigate this disadvantage, if the data output is charged with a comparatively large capacity, this will hardly be discharged when the extra field effect transistor is switched on, which causes a high reverse voltage peak across the inductance formed by the connection wires of the integrated circuit. It is possible to switch on the extra field effect transistor at a later instant but this has for its result that the output voltage becomes more inert, which is highly undesirable.